/* include/drm/drm_atomic.h */
struct drm_atomic_state {
    struct kref ref;
    struct drm_device *dev;

    bool allow_modeset : 1;
    bool legacy_cursor_update : 1;
    bool async_update : 1;
    bool duplicated : 1;

    struct __drm_planes_state   *planes;
    struct __drm_crtcs_state    *crtcs;
    struct __drm_connectors_state *connectors;

    int num_connector;
    struct drm_modeset_acquire_ctx *acquire_ctx;

    struct drm_crtc_commit *fake_commit;
    struct work_struct commit_work;
};

/* CRTC state */
struct drm_crtc_state {
    struct drm_crtc *crtc;
    bool enable;
    bool active;
    bool planes_changed : 1;
    bool mode_changed : 1;
    bool active_changed : 1;
    bool connectors_changed : 1;

    struct drm_display_mode mode;
    struct drm_display_mode adjusted_mode;

    u32 plane_mask;
    u32 connector_mask;
    u32 encoder_mask;

    struct drm_crtc_commit *commit;
    /* ... */
};

/* Plane state */
struct drm_plane_state {
    struct drm_plane *plane;
    struct drm_crtc *crtc;
    struct drm_framebuffer *fb;

    /* 源矩形（Q16.16 定点数，像素坐标）*/
    uint32_t src_x, src_y, src_w, src_h;
    /* 目标矩形（整数，屏幕坐标）*/
    int32_t crtc_x, crtc_y;
    uint32_t crtc_w, crtc_h;

    /* rotation / z-order / alpha */
    unsigned int rotation;
    unsigned int zpos;
    u16 alpha;
    /* ... */
};

struct meson_plane_state {
    struct drm_plane_state base; /* 必须放第一位 */
    /* 驱动私有字段 */
    bool premult_alpha;
};

/* libdrm 调用示例 */
drmModeAtomicReqPtr req = drmModeAtomicAlloc();
drmModeAtomicAddProperty(req, plane_id, prop_fb_id,   fb_id);
drmModeAtomicAddProperty(req, plane_id, prop_crtc_id, crtc_id);
drmModeAtomicAddProperty(req, plane_id, prop_src_w,   width << 16);
drmModeAtomicAddProperty(req, plane_id, prop_crtc_w,  width);

uint32_t flags = DRM_MODE_ATOMIC_ALLOW_MODESET;
drmModeAtomicCommit(fd, req, flags, NULL);
drmModeAtomicFree(req);

/* drivers/gpu/drm/drm_atomic_helper.c */
int drm_atomic_helper_check(struct drm_device *dev,
                             struct drm_atomic_state *state)
{
    int ret;

    ret = drm_atomic_helper_check_modeset(dev, state);
    if (ret)
        return ret;

    if (dev->mode_config.normalize_zpos) {
        ret = drm_atomic_normalize_zpos(dev, state);
        if (ret)
            return ret;
    }

    ret = drm_atomic_helper_check_planes(dev, state);
    if (ret)
        return ret;

    if (state->legacy_cursor_update)
        state->async_update = !drm_atomic_helper_async_check(dev, state);

    drm_self_refresh_helper_alter_state(state);

    return ret;
}

void drm_atomic_helper_commit_planes(struct drm_device *dev,
                                     struct drm_atomic_state *old_state,
                                     uint32_t flags)
{
    struct drm_crtc *crtc;
    struct drm_crtc_state *old_crtc_state, *new_crtc_state;
    struct drm_plane *plane;
    struct drm_plane_state *old_plane_state, *new_plane_state;
    int i;

    /* 调用每个 CRTC 的 begin 回调 */
    for_each_oldnew_crtc_in_state(old_state, crtc,
                                  old_crtc_state, new_crtc_state, i) {
        funcs = crtc->helper_private;
        if (funcs->atomic_begin)
            funcs->atomic_begin(crtc, old_state);
    }

    /* 遍历所有 plane，调用 atomic_update 或 atomic_disable */
    for_each_oldnew_plane_in_state(old_state, plane,
                                   old_plane_state, new_plane_state, i) {
        funcs = plane->helper_private;
        if (drm_atomic_plane_disabling(old_plane_state, new_plane_state)) {
            funcs->atomic_disable(plane, old_state);
        } else {
            funcs->atomic_update(plane, old_state);
        }
    }

    /* 调用每个 CRTC 的 flush 回调，触发硬件生效 */
    for_each_oldnew_crtc_in_state(old_state, crtc,
                                  old_crtc_state, new_crtc_state, i) {
        funcs = crtc->helper_private;
        if (funcs->atomic_flush)
            funcs->atomic_flush(crtc, old_state);
    }
}

static int my_plane_atomic_check(struct drm_plane *plane,
                                  struct drm_atomic_state *state)
{
    struct drm_plane_state *new_state =
        drm_atomic_get_new_plane_state(state, plane);

    /* 示例：检查格式支持 */
    if (new_state->fb) {
        switch (new_state->fb->format->format) {
        case DRM_FORMAT_XRGB8888:
        case DRM_FORMAT_ARGB8888:
        case DRM_FORMAT_NV12:
            break;
        default:
            DRM_DEBUG_ATOMIC("unsupported format %p4cc\n",
                             &new_state->fb->format->format);
            return -EINVAL;
        }
    }

    /* 示例：检查缩放比例上限（最大 8x 缩放）*/
    if (new_state->crtc_w > 0 && new_state->src_w > 0) {
        u32 src_w = new_state->src_w >> 16;
        if (src_w / new_state->crtc_w > 8) {
            DRM_DEBUG_ATOMIC("downscale ratio too large\n");
            return -EINVAL;
        }
    }

    return 0;
}

static void my_atomic_commit_tail(struct drm_atomic_state *old_state)
{
    struct drm_device *dev = old_state->dev;

    /* 先关掉旧的 encoder/CRTC */
    drm_atomic_helper_commit_modeset_disables(dev, old_state);

    /* 更新所有 plane */
    drm_atomic_helper_commit_planes(dev, old_state,
                                    DRM_PLANE_COMMIT_ACTIVE_ONLY);

    /* 开启新的 encoder/CRTC */
    drm_atomic_helper_commit_modeset_enables(dev, old_state);

    /* 等待下一个 VBlank，确保帧完整显示 */
    drm_atomic_helper_wait_for_flip_done(dev, old_state);

    /* 释放旧 framebuffer */
    drm_atomic_helper_cleanup_planes(dev, old_state);
}

static const struct drm_mode_config_helper_funcs my_mode_config_helpers = {
    .atomic_commit_tail = my_atomic_commit_tail,
};

/* drm_atomic_helper.c */
int drm_atomic_helper_commit(struct drm_device *dev,
                              struct drm_atomic_state *state,
                              bool nonblock)
{
    /* ... check ... */

    if (nonblock)
        return drm_atomic_helper_setup_commit(state, nonblock);

    /* 同步路径：直接调用 commit_tail */
    drm_atomic_helper_commit_tail(state);
    return 0;
}

struct drm_crtc_commit {
    struct drm_crtc *crtc;

    struct kref ref;

    /* flip_done：plane 更新完成（可以释放旧 fb）*/
    struct completion flip_done;

    /* hw_done：硬件配置完成（可以开始下一次 commit）*/
    struct completion hw_done;

    /* cleanup_done：cleanup_planes 完成（可以销毁 state）*/
    struct completion cleanup_done;

    struct list_head commit_entry;
    struct drm_pending_vblank_event *event;
    bool abort_completion;
};

static irqreturn_t my_vblank_irq_handler(int irq, void *data)
{
    struct my_drm_private *priv = data;

    /* 触发硬件寄存器影子寄存器生效 */
    writel(BIT(0), priv->regs + REG_UPDATE_LATCH);

    drm_crtc_handle_vblank(&priv->crtc);
    return IRQ_HANDLED;
}

/* 正确做法：等待 flip_done 再 cleanup */
drm_atomic_helper_wait_for_flip_done(dev, old_state);
drm_atomic_helper_cleanup_planes(dev, old_state);

/* ATF bl1_main.c 简化逻辑 */
void bl1_main(void)
{
    /* 加载 BL2 镜像描述 */
    image_info_t bl2_image = load_image(BL2_ID);

    /* 构造 BL2 入口参数：在 EL1 Secure 运行 */
    entry_point_info_t ep = {
        .pc    = bl2_image.image_base,
        .spsr  = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
        /* NS bit = 0 → Secure EL1 */
    };

    /* ERET 到 EL1S */
    bl1_run_next_image(&ep);
}

/* TZC-400 配置示例（保护安全内存区域）*/
tzc400_init(TZC_BASE);
/* 区域0：默认拒绝所有访问 */
tzc400_configure_region0(TZC_REGION_S_NONE, 0);
/* 区域1：安全 TEE 内存，仅 Secure 可访问 */
tzc400_configure_region(1,
    TEE_DRAM_BASE, TEE_DRAM_BASE + TEE_DRAM_SIZE - 1,
    TZC_REGION_S_RDWR,   /* Secure RW */
    0);                   /* Non-Secure 拒绝 */
/* 区域2：共享内存，Normal World 只读 */
tzc400_configure_region(2,
    SHARED_MEM_BASE, SHARED_MEM_BASE + SHARED_MEM_SIZE - 1,
    TZC_REGION_S_RDWR,
    TZC_REGION_ACCESS_RDONLY(0));
tzc400_set_action(TZC_ACTION_ERR); /* 违规触发总线错误 */

/* GICv3 初始化 (gicv3_driver_init) */
void gicv3_distif_init(void)
{
    /* 禁用 Distributor */
    gicd_write_ctlr(gicd_base, 0);

    /* 配置所有 SPI 为不触发（默认禁用）*/
    for (i = MIN_SPI_ID; i <= MAX_SPI_ID; i += 32)
        gicd_write_icenabler(gicd_base, i, 0xFFFFFFFF);

    /* 设置 SPI 默认优先级 */
    for (i = MIN_SPI_ID; i <= MAX_SPI_ID; i += 4)
        gicd_write_ipriorityr(gicd_base, i, GIC_HIGHEST_NS_PRIORITY);

    /* 启用 Affinity Routing (ARE_S/ARE_NS) */
    gicd_write_ctlr(gicd_base,
        CTLR_ENABLE_G0_BIT | CTLR_ENABLE_G1S_BIT |
        CTLR_ENABLE_G1NS_BIT | CTLR_ARE_S_BIT | CTLR_ARE_NS_BIT);
}

/* BL31 SMC 处理入口（简化）*/
uintptr_t smc_handler(uint32_t smc_fid, u_register_t x1,
                      u_register_t x2, u_register_t x3,
                      u_register_t x4, void *cookie,
                      void *handle, u_register_t flags)
{
    uint32_t owning_entity = GET_SMC_OEN(smc_fid);

    switch (owning_entity) {
    case OEN_ARM_START ... OEN_ARM_END:
        /* ARM 标准服务：PSCI, SDEI, etc. */
        return arm_svc_smc_handler(smc_fid, ...);
    case OEN_SIP_START ... OEN_SIP_END:
        /* 厂商 SiP 服务（如 Amlogic 私有服务）*/
        return sip_svc_smc_handler(smc_fid, ...);
    case OEN_TOS_START ... OEN_TOS_END:
        /* 路由到 TEE OS (BL32) */
        return optee_smc_handler(smc_fid, ...);
    }
}

/* U-Boot arch/arm/cpu/armv8/cache.c 简化 */
void enable_caches(void)
{
    /* 建立平坦映射页表（identity map）*/
    setup_pgtables();   /* TTBR0_EL1/EL2 指向页表基地址 */

    /* 设置 TCR_EL2：4KB 粒度，48-bit VA */
    write_tcr_el2(TCR_EL2_PS_BITS_48 | TCR_EL2_TG0_4K |
                  TCR_EL2_IRGN0_WBWA | TCR_EL2_ORGN0_WBWA |
                  TCR_EL2_T0SZ(16));

    /* MAIR：内存属性配置（Device/Normal/NC）*/
    write_mair_el2(MAIR_ATTR_DEVICE_nGnRE    << (0 * 8) |
                   MAIR_ATTR_NORMAL_WB_NTR_RA_WA << (1 * 8));

    isb();
    /* 开启 MMU + D-Cache + I-Cache */
    set_sctlr(get_sctlr() | CR_M | CR_C | CR_I);
    isb();
}

/* drivers/irqchip/irq-gic-v3.c 关键初始化 */
static int gic_init_bases(...)
{
    /* 初始化 Distributor */
    gic_dist_init(gic_data);

    /* 每个 CPU 初始化 Redistributor + CPU Interface */
    gic_cpu_init(gic_data);        /* 设置 SRE, PMR, BPR */
    gic_smp_init();                /* 注册 IPI 中断 */

    /* 设置中断亲和性、优先级、触发方式 */
    set_handle_irq(gic_handle_irq);
}

// cambr_drm_drv.h
#define DRIVER_NAME    "cndrm"
#define DRIVER_DESC    "Cn SoC DRM"

// cambr_drm_drv.c
static struct drm_driver cambr_drm_driver = {
    .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
    .name            = DRIVER_NAME,
    .fops            = &cambr_drm_driver_fops,
    DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(drm_gem_dma_dumb_create),
};

static int cambr_drm_bind(struct device *dev)
{
    // 1. 分配 DRM 设备
    drm = drm_dev_alloc(&cambr_drm_driver, dev);
    
    // 2. 初始化模式配置
    drmm_mode_config_init(drm);
    drm->mode_config.max_width = CN_MAX_FB_WIDTH;  // 4096
    drm->mode_config.max_height = CN_MAX_FB_HEIGHT;  // 4096
    
    // 3. 初始化 Vblank
    drm_vblank_init(drm, MAX_CRTC);  // MAX_CRTC = 1
    
    // 4. 绑定子组件
    component_bind_all(dev, drm);
    
    // 5. 注册 DRM 设备
    drm_dev_register(drm, 0);
    
    // 6. 初始化 fbdev
    drm_fbdev_generic_setup(drm, 32);
}

// cambr_vop_drv.c
static int cambr_vop_bind(struct device *dev, struct device *mdev, void *data)
{
    // 1. 创建 Primary Plane
    ret = cambr_plane_create(drm, &cndrm_vop->plane, DRM_PLANE_TYPE_PRIMARY);
    
    // 2. 创建 CRTC
    ret = cambr_crtc_init(drm, &cndrm_vop->crtc, &cndrm_vop->plane);
    
    // 3. 注册中断处理
    irq = platform_get_irq(pdev, 0);
    ret = devm_request_irq(&pdev->dev, irq, vop_irq_handler, ...);
}

// cambr_hdmi_drv.c
static int cambr_hdmi_bind(struct device *dev, struct device *mdev, void *data)
{
    // 1. 初始化 Encoder
    ret = drm_encoder_init(drm, &cndrm_hdmi->encoder,
                           DRM_MODE_ENCODER_TMDS, NULL);
    
    // 2. 初始化 Connector
    ret = drm_connector_init(drm, &cndrm_hdmi->connector,
                            DRM_MODE_CONNECTOR_HDMIA);
    
    // 3. 关联 Encoder 与 Connector
    drm_connector_attach_encoder(&cndrm_hdmi->connector, 
                                  &cndrm_hdmi->encoder);
}

// cambr_drm_crtc.c
static void cambr_plane_atomic_update(struct drm_plane *plane,
                                      struct drm_atomic_state *state)
{
    // 1. 获取 GEM 对象
    gem = drm_fb_dma_get_gem_obj(new_state->fb, 0);
    layer_mode.addr = gem->dma_addr;
    
    // 2. 配置 OVL 层
    vop_ovl_config(cndrm_vop->regs, OVL_LAYER2, &layer_mode);
    
    // 3. 配置 RVDMA
    vop_rvdma_config(cndrm_vop->regs, RCHN_GRP2, &layer_mode);
    
    // 4. 更新地址
    vop_update_plane(cndrm_vop->regs, RCHN_GRP2, &layer_mode);
    
    // 5. 启用 OVL 层
    vop_ovl_enable(cndrm_vop->regs, OVL_LAYER2, OVL_ENABLE);
}

static const struct drm_crtc_helper_funcs cambr_crtc_helper_funcs = {
    .mode_valid   = cambr_crtc_mode_valid,
    .mode_fixup   = cambr_crtc_mode_fixup,
    .mode_set_nofb = cambr_crtc_mode_set_nofb,
    .atomic_flush = cambr_crtc_atomic_flush,
    .atomic_enable = cambr_crtc_atomic_enable,
    .atomic_disable = cambr_crtc_atomic_disable,
};

static void cambr_crtc_atomic_enable(struct drm_crtc *crtc,
                                      struct drm_atomic_state *state)
{
    // 1. 开启 VBlank 中断
    reg_clear(cndrm_vop->regs, VO_CMN_INTR_MASK, 
              RG_DISP_SOF_INTR_MASK);
    
    // 2. 开启 DPI
    reg_write(cndrm_vop->regs, DISP_DPI_EN, 0x00800005);
}

const struct cndrm_format_info cndrm_format_infos[] = {
    { .fourcc = DRM_FORMAT_ARGB8888, .pixel_format = PIXEL_FORMAT_ARGB8888_PACKED },
    { .fourcc = DRM_FORMAT_XRGB8888, .pixel_format = PIXEL_FORMAT_XRGB8888_PACKED },
    { .fourcc = DRM_FORMAT_NV12,     .csc_format = CSC_YUV420_RGB,
      .csc_conv_type = CSC_BT709_RGB, .pixel_format = PIXEL_FORMAT_YUV420_SEMI_PLANAR },
    { .fourcc = DRM_FORMAT_NV21,    .csc_format = CSC_YUV420_RGB,
      .csc_conv_type = CSC_BT709_RGB, .pixel_format = PIXEL_FORMAT_YVU420_SEMI_PLANAR },
    { .fourcc = DRM_FORMAT_NV16,    .csc_format = CSC_YUV422_RGB,
      .csc_conv_type = CSC_BT709_RGB, .pixel_format = PIXEL_FORMAT_YUV422_SEMI_PLANAR },
    { .fourcc = DRM_FORMAT_NV61,    .csc_format = CSC_YUV422_RGB,
      .csc_conv_type = CSC_BT709_RGB, .pixel_format = PIXEL_FORMAT_YVU422_SEMI_PLANAR },
};

if (format->is_yuv == true) {
    // 配置 YUV->RGB 转换
    reg_write_field(cndrm_vop->regs, OVL_LAYER0_CSC_MAIN_CFG, 
                    0x00, 0x4, layer_mode.csc_format);
    reg_write_field(cndrm_vop->regs, OVL_LAYER0_CSC_MAIN_CFG, 
                    0x04, 0x4, layer_mode.csc_conv_type);
    // 启用 CSC
    reg_clear(cndrm_vop->regs, OVL_LAYER0_CSC_MAIN_CFG, CSC_BYPASS);
} else {
    // 绕过 CSC
    reg_set(cndrm_vop->regs, OVL_LAYER0_CSC_MAIN_CFG, CSC_BYPASS);
}

// 1. 主设备定义
static const struct component_master_ops cambr_drm_ops = {
    .bind = cambr_drm_bind,
    .unbind = cambr_drm_unbind,
};

// 2. 子设备绑定
static const struct component_ops cambr_vop_ops = {
    .bind = cambr_vop_bind,
    .unbind = cambr_vop_unbind,
};

// 3. 设备树解析与组件匹配
for (i = 0; ; i++) {
    np = of_parse_phandle(dev->of_node, "ports", i);
    if (!np) break;
    
    // 添加 ports 节点
    component_match_add(dev, &match, compare_of, np);
    
    // 遍历每个 port 的 endpoint
    for_each_endpoint_of_node(np, ep) {
        remote = of_graph_get_remote_port_parent(ep);
        if (remote && of_device_is_available(remote)) {
            // 添加远程设备
            component_match_add(dev, &match, compare_of, remote);
        }
    }
}

// 4. 注册主设备
component_master_add_with_match(&pdev->dev, &cambr_drm_ops, match);

// 驱动定义使用宏自动生成 GEM 操作
DEFINE_DRM_GEM_DMA_FOPS(cambr_drm_driver_fops);

static struct drm_driver cambr_drm_driver = {
    // ...
    DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(drm_gem_dma_dumb_create),
};

static const struct drm_mode_config_funcs cambr_drm_mode_config_funcs = {
    .fb_create = drm_gem_fb_create,
    .atomic_check = drm_atomic_helper_check,
    .atomic_commit = drm_atomic_helper_commit,
};

void vosys_crg_init(const void __iomem *regs)
{
    // 视频系统时钟使能
    reg_write(regs, VOSYS_CRG_VOPROC0_VCLK_CLK_SEL, 0x00020002);
    reg_write(regs, VOSYS_CRG_CLK_EN_0, 0x80008000);
    reg_write(regs, VOSYS_CRG_CLK_EN_1, 0xFFC7FFC7);
    reg_write(regs, VOSYS_CRG_CLK_EN_2, 0xFFEFFFEF);
    reg_write(regs, VO_PROC_CRG_CLK_EN, 0xFFFFFFFF);
    
    // 复位控制
    reg_write(regs, VOSYS_CRG_RST_CTRL_0, 0xFFFFFFFF);
    reg_write(regs, VOSYS_CRG_RST_CTRL_1, 0xFFFFFFFF);
    reg_write(regs, VOSYS_CRG_RST_CTRL_2, 0xFFFFFF9F);
}

void vop_dpi_config(void __iomem *regs)
{
    // DPI 控制
    reg_write(regs, DISP_DPI_CL_CTRL, 0x00);
    
    // 时序参数
    reg_write(regs, DISP_DPI_TIM_CFG0, 0x00580094);  // Hsync/Vsync
    reg_write(regs, DISP_DPI_TIM_CFG1, 0x0780002C);  // Vbp/Vfp
    reg_write(regs, DISP_DPI_TIM_CFG4, 0x00040024);  // Vact
    reg_write(regs, DISP_DPI_TIM_CFG5, 0x04380005);  // Hact high
    reg_write(regs, DISP_DPI_TIM_CFG6, 0x04380780);  // Hact low
    
    // 数据复用配置
    reg_write(regs, DISP_DPI_DATA_MUX4, 0x3bcdeb38);
    reg_write(regs, DISP_DPI_OUTSTAGE_CFG, 0x00002406);
}

// meson_gem.c:636
struct am_meson_gem_object *am_meson_gem_object_create(
    struct drm_device *dev,
    unsigned int flags,
    unsigned long size)
{
    // 1. 分配 am_meson_gem_object 结构体
    meson_gem_obj = kzalloc(sizeof(*meson_gem_obj), GFP_KERNEL);
    
    // 2. 初始化 DRM GEM 对象
    ret = drm_gem_object_init(dev, &meson_gem_obj->base, size);
    
    // 3. 根据 flags 分配内存缓冲区
    if ((flags & MESON_USE_VIDEO_PLANE) && (flags & MESON_USE_PROTECTED))
        ret = am_meson_gem_alloc_video_secure_buff(meson_gem_obj);  // 安全内存
    else
        ret = am_meson_gem_alloc_ion_buff(meson_gem_obj, flags);    // ION/DMA heap
    
    // 4. 如果是 UVM 缓冲区，初始化 uvm_buf_obj
    if (meson_gem_obj->is_uvm) {
        meson_gem_obj->ubo.arg = meson_gem_obj;
        meson_gem_obj->ubo.dev = dev->dev;
    }
    
    return meson_gem_obj;
}

// meson_gem.c:60 - 内存分配核心函数
static int am_meson_gem_alloc_ion_buff(struct am_meson_gem_object *meson_gem_obj, int flags)
{
    // 优先级：heap-fb -> heap-gfx -> heap-codecmm -> system
    char DMAHEAP[][20] = {"heap-fb", "heap-gfx", "heap-codecmm"};
    
    for (i = 0; i < 3; i++) {
        heap = dma_heap_find(DMAHEAP[i]);
        dmabuf = dma_heap_buffer_alloc(heap, size, O_RDWR, DMA_HEAP_VALID_HEAP_FLAGS);
        if (!IS_ERR_OR_NULL(dmabuf))
            break;
    }
    
    // 创建 DMA attachment 和 sg_table
    attachment = dma_buf_attach(dmabuf, dev->dev);
    sg_table = dma_buf_map_attachment(attachment, DMA_BIDIRECTIONAL);
    
    // 同步 cache
    dma_sync_sg_for_device(dev->dev, sg_table->sgl, sg_table->nents, DMA_TO_DEVICE);
    
    // 获取物理地址
    meson_gem_obj->addr = PFN_PHYS(page_to_pfn(page));
}

// meson_gem.c:306 - GEM 对象释放
void meson_gem_object_free(struct drm_gem_object *obj)
{
    struct am_meson_gem_object *meson_gem_obj = to_am_meson_gem_obj(obj);
    
    // 1. 安全内存释放
    if ((flags & MESON_USE_VIDEO_PLANE) && (flags & MESON_USE_PROTECTED))
        am_meson_gem_free_video_secure_buf(meson_gem_obj);
    // 2. ION/DMA heap 释放
    else if (!obj->import_attach)
        am_meson_gem_free_ion_buf(obj->dev, meson_gem_obj);
    // 3. Prime 导入的缓冲区释放
    else
        drm_prime_gem_destroy(obj, meson_gem_obj->sg);
    
    // 4. 释放 mmap offset
    drm_gem_free_mmap_offset(obj);
    
    // 5. 释放 GEM 对象引用
    drm_gem_object_release(obj);
    
    kfree(meson_gem_obj);
}

// meson_crtc.c:236 - Fence ops 定义
static const char *meson_crtc_fence_get_driver_name(struct dma_fence *fence)
{
    return "meson";
}

static const char *meson_crtc_fence_get_timeline_name(struct dma_fence *fence)
{
    return "present_fence";  // Timeline 名称
}

static const struct dma_fence_ops meson_crtc_fence_ops = {
    .get_driver_name = meson_crtc_fence_get_driver_name,
    .get_timeline_name = meson_crtc_fence_get_timeline_name,
};

// 创建 fence
struct dma_fence *meson_crtc_create_fence(spinlock_t *lock)
{
    fence = kzalloc(sizeof(*fence), GFP_KERNEL);
    dma_fence_init(fence, &meson_crtc_fence_ops, lock, 0, 0);
    return fence;
}

// meson_crtc.c:265 - IOCTL 实现
int meson_crtc_creat_present_fence_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
    struct drm_meson_present_fence *arg = data;
    struct am_meson_crtc *amcrtc = ...;
    
    // 创建 fence
    fence = meson_crtc_create_fence(&pre_fence->lock);
    
    // 导出为 sync_file fd
    sync_file = sync_file_create(fence);
    fd = get_unused_fd_flags(O_CLOEXEC);
    fd_install(fd, sync_file->file);
    
    arg->fd = fd;
    pre_fence->fence = fence;
    pre_fence->sync_file = sync_file;
}

// meson_plane.c:859 - Video fence 创建
static struct dma_fence *am_meson_video_create_fence(spinlock_t *lock)
{
    fence = kzalloc(sizeof(*fence), GFP_KERNEL);
    dma_fence_init(fence, &am_meson_video_plane_fence_ops, lock, 0, 0);
    return fence;
}

// Fence 与 vframe 绑定
static void bind_video_fence_vframe(struct meson_vpu_video *video, 
    struct dma_fence *fence, u32 index, struct vframe_s *vf)
{
    info->fence = fence;
    info->vf = vf;
}

// Fence 信号 - 当视频帧显示完成时调用
static void video_fence_signal(struct meson_vpu_video *video, struct vframe_s *vf)
{
    list_for_each_safe(...) {
        if (info_cur->vf == vf) {
            dma_fence_signal(info_cur->fence);  // 信号 fence
            dma_fence_put(info_cur->fence);
            info_cur->fence = NULL;
        }
    }
}

// meson_atomic.c:185 - Commit tail 阶段
static void meson_commit_tail(struct drm_atomic_state *old_state)
{
    // 1. 等待所有 plane 的 fence
    drm_atomic_helper_wait_for_fences(dev, old_state, false);
    
    // 2. 等待之前的 commit 完成
    meson_drm_atomic_helper_wait_for_dependencies(old_state);
    
    // 3. 执行硬件配置
    if (funcs->atomic_commit_tail)
        funcs->atomic_commit_tail(old_state);
    
    // 4. 标记完成
    drm_atomic_helper_commit_cleanup_done(old_state);
}

// meson_async_atomic.c:86 - 读取 in_fence_fd
} else if (property == config->prop_in_fence_fd) {
    if (state->fence)
        return -EINVAL;
    
    state->fence = sync_file_get_fence(val);  // 获取用户空间的 fence
    if (!state->fence)
        return -EINVAL;
}

// meson_crtc.c:141 - CRTC state 复制
static struct drm_crtc_state *meson_crtc_duplicate_state(struct drm_crtc *crtc)
{
    new_state = kzalloc(sizeof(*new_state), GFP_KERNEL);
    
    // 复制基础 state
    __drm_atomic_helper_crtc_duplicate_state(crtc, &new_state->base);
    
    // 复制私有 state
    new_state->crtc_hdr_process_policy = cur_state->crtc_hdr_process_policy;
    new_state->crtc_dv_enable = cur_state->crtc_dv_enable;
    new_state->vmode = cur_state->vmode;
    new_state->seamless = cur_state->seamless;
    // ...
    
    return &new_state->base;
}

// meson_atomic.c:652 - Commit tail RPM
void meson_atomic_helper_commit_tail_rpm(struct drm_atomic_state *old_state)
{
    // 1. 禁用不再使用的资源
    drm_atomic_helper_commit_modeset_disables(dev, old_state);
    
    // 2. 使能需要使用的资源（模式设置）
    drm_atomic_helper_commit_modeset_enables(dev, old_state);
    
    // 3. 配置 plane（帧缓冲、位置、缩放）
    drm_atomic_helper_commit_planes(dev, old_state, DRM_PLANE_COMMIT_ACTIVE_ONLY);
    
    // 4. 伪造 vblank
    drm_atomic_helper_fake_vblank(old_state);
    
    // 5. 标记硬件完成
    drm_atomic_helper_commit_hw_done(old_state);
    
    // 6. 等待 vblank
    meson_drm_atomic_helper_wait_for_vblanks(dev, old_state);
    
    // 7. 清理 plane 资源
    drm_atomic_helper_cleanup_planes(dev, old_state);
}

// meson_crtc.c:655 - CRTC enable
static void am_meson_crtc_atomic_enable(struct drm_crtc *crtc, 
    struct drm_atomic_state *state)
{
    // 验证并设置显示模式
    vout_func_validate_vmode(state->mode.name);
    vout_func_set_state(state->mode.name);
    
    // 更新 VIU 配置
    vout_func_update_viu();
    
    // 开启 vblank 中断
    drm_crtc_vblank_on(crtc);
}

// meson_atomic.c:120 - 等待 commit 完成
static int meson_drm_crtc_commit_wait(struct drm_crtc_commit *commit)
{
    // 1. 等待硬件编程完成 (100ms 超时)
    ret = wait_for_completion_timeout(&commit->hw_done, HZ / 10);
    if (!ret)
        return -ETIMEDOUT;
    
    // 2. 等待 flip 完成
    ret = wait_for_completion_timeout(&commit->flip_done, HZ / 10);
    if (!ret)
        return -ETIMEDOUT;
    
    return 0;
}

// drm_crtc_commit 结构
struct drm_crtc_commit {
    struct completion flip_done;     // 用户空间 flip 完成
    struct completion hw_done;      // 硬件编程完成
    struct completion cleanup_done; // 清理完成
    struct drm_crtc *crtc;
    struct drm_pending_vblank_event *event;
};

// DRM framework - drm_atomic_state
struct drm_atomic_state {
    struct drm_device *dev;
    struct drm_modeset_acquire_ctx *acquire_ctx;
    
    // 状态数组指针
    struct drm_crtc_state **crtc_states;
    struct drm_plane_state **plane_states;
    struct drm_connector_state **connector_states;
    
    // Commit 跟踪
    struct drm_crtc_commit **crtcs;
    struct work_struct commit_work;  // 异步 commit work
    
    bool allow_modeset:1;
    bool legacy_cursor_update:1;
    bool async_update:1;
};

// Meson 私有 CRTC state
struct am_meson_crtc_state {
    struct drm_crtc_state base;
    enum vmode_e vmode;              // 当前显示模式
    enum vmode_e preset_vmode;       // 预设模式
    bool seamless;                   // 无缝切换
    bool crtc_dv_enable;            // Dolby Vision
    bool crtc_hdr_enable;           // HDR
    u8 crtc_hdr_process_policy;     // HDR 处理策略
};

// meson_crtc.c:841 - CRTC atomic check
static int meson_crtc_atomic_check(struct drm_crtc *crtc, 
    struct drm_atomic_state *state)
{
    struct am_meson_crtc_state *new_state = to_am_meson_crtc_state(state);
    
    // 检查 HDR/DV 参数变化
    if (new_state->crtc_hdr_process_policy != cur_state->crtc_hdr_process_policy ||
        new_state->crtc_dv_enable != cur_state->crtc_dv_enable) {
        new_state->base.mode_changed = true;
    }
    
    // VPU pipeline 检查
    return vpu_pipeline_check(priv->pipeline, crtc, state);
}

// drm_atomic_helper_swap_state - 交换新旧 state
int drm_atomic_helper_swap_state(struct drm_atomic_state *state, bool commit)
{
    // 遍历所有 CRTC
    for_each_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
        // 1. 保存当前硬件状态到 old_crtc_state
        crtc->funcs->atomic_flush(crtc, old_crtc_state);
        
        // 2. 用 new_crtc_state 替换 crtc->state
        crtc->state = new_crtc_state;
        new_crtc_state->state = state;
    }
    
    // 同样的逻辑应用于 plane 和 connector
}

// drm_atomic_helper_swap_state - 交换新旧 state
int drm_atomic_helper_swap_state(struct drm_atomic_state *state, bool commit)
{
    // 遍历所有 CRTC
    for_each_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
        // 1. 保存当前硬件状态到 old_crtc_state
        crtc->funcs->atomic_flush(crtc, old_crtc_state);
        
        // 2. 用 new_crtc_state 替换 crtc->state
        crtc->state = new_crtc_state;
        new_crtc_state->state = state;
    }
    
    // 同样的逻辑应用于 plane 和 connector
}

// meson_async_atomic.c - 锁初始化
struct drm_modeset_acquire_ctx ctx;
drm_modeset_acquire_init(&ctx, 0);
state->acquire_ctx = &ctx;

// 死锁处理
if (ret == -EDEADLK) {
    drm_atomic_state_clear(state);
    drm_modeset_backoff(&ctx);  // 随机化锁获取顺序
    goto retry;
}

// meson_async_atomic.c
state->allow_modeset = false;  // Async atomic 禁用 modeset

// meson_crtc.c - 强制 mode changed
if (atomic_state->allow_modeset) {
    if (cur_state->crtc_dv_enable != new_state->crtc_dv_enable)
        crtc_state->mode_changed = true;
}

// meson_crtc.c - 复制 state
static struct drm_crtc_state *meson_crtc_duplicate_state(struct drm_crtc *crtc)
{
    struct am_meson_crtc_state *new_state, *cur_state;
    cur_state = to_am_meson_crtc_state(crtc->state);
    
    new_state = kzalloc(sizeof(*new_state), GFP_KERNEL);
    __drm_atomic_helper_crtc_duplicate_state(crtc, &new_state->base);
    
    // 复制 Meson 特定状态
    new_state->crtc_hdr_process_policy = cur_state->crtc_hdr_process_policy;
    new_state->crtc_dv_enable = cur_state->crtc_dv_enable;
    new_state->vmode = cur_state->vmode;
    new_state->seamless = false;  // 新状态默认非 seamless
    
    return &new_state->base;
}

// 失败时的恢复机制
void drm_atomic_state_clear(struct drm_atomic_state *state)
{
    int i;
    
    // 清理 connector states
    for (i = 0; i < state->num_connector; i++) {
        if (state->connectors[i].state) {
            drm_connector_state_put(state->connectors[i].state);
            state->connectors[i].state = NULL;
        }
    }
    // 同样的逻辑用于 CRTC 和 Plane
}

// Meson 驱动错误处理
err:
    drm_atomic_helper_cleanup_planes(dev, state);
    return ret;

// meson_atomic.c
if (state->legacy_cursor_update) {
    ret = drm_atomic_helper_setup_commit(state, nonblock);
    state->legacy_cursor_update = false;
}

// meson_crtc.c - Pipeline 级别状态
static void meson_crtc_atomic_print_state(...)
{
    struct meson_vpu_pipeline_state *mvps;
    struct drm_private_state *obj_state;
    
    obj_state = priv->pipeline->obj.state;
    mvps = container_of(obj_state, struct meson_vpu_pipeline_state, obj);
}

// meson_drv.c:283 - DRM bind
static int am_meson_drm_bind(struct device *dev)
{
    // 1. 初始化 DRM 设备
    drm = drm_dev_alloc(&meson_driver, dev);
    
    // 2. 初始化 mode config
    drm_mode_config_init(drm);
    
    // 3. 初始化 VPU topology
    vpu_topology_init(pdev, priv);
    
    // 4. 绑定所有子组件驱动 (HDMI, LCD, CVBS)
    ret = component_bind_all(dev, &priv->bound_data);
    
    // 5. 初始化 per-CRTC commit 线程
    ret = meson_worker_thread_init(priv, drm->mode_config.num_crtc);
    
    // 6. 注册 DRM 设备
    drm_dev_register(drm, 0);
}

// meson_of_parser.c - 设备树解析
struct meson_of_conf {
    u32 crtc_masks[ENCODER_MAX];  // 每个 encoder 可用的 CRTC
    u32 crtcmask_osd;             // OSD 层 CRTC 映射
    u32 crtcmask_video;           // Video 层 CRTC 映射
};

// 默认配置
for (i = 0; i < ENCODER_MAX; i++)
    conf->crtc_masks[i] = 1;  // 默认使用 CRTC0

// 设备树覆盖示例:
// crtc_masks = <0x1>, <0x2>, <0x4>  // HDMI->CRTC0, LCD->CRTC1, CVBS->CRTC2

// meson_atomic.c:470 - commit 入口
int meson_atomic_commit(struct drm_device *dev, 
    struct drm_atomic_state *state, bool nonblock)
{
    // 设置 commit 跟踪结构
    ret = meson_drm_atomic_helper_setup_commit(state, nonblock);
    
    // 准备 plane 资源
    ret = drm_atomic_helper_prepare_planes(dev, state);
    
    // 交换 state
    ret = drm_atomic_helper_swap_state(state, true);
    
    if (nonblock) {
        // 创建 kthread work
        work_item->crtc_id = crtc_index;
        kthread_init_work(&work_item->kthread_work, meson_commit_work);
        
        // 队列到 per-CRTC worker
        worker = &priv->commit_thread[crtc_index].worker;
        kthread_queue_work(worker, &work_item->kthread_work);
        
        return 0;  // 立即返回
    } else {
        // 同步等待完成
        meson_commit_tail(state);
    }
}

// meson_atomic.c:491 - async update 路径
if (state->async_update) {
    // 准备 plane
    ret = drm_atomic_helper_prepare_planes(dev, state);
    
    // 交换 state
    ret = drm_atomic_helper_swap_state(state, true);
    
    // 直接执行 plane update，不走完整 commit
    meson_atomic_helper_async_commit(dev, state);
    
    // 清理
    drm_atomic_helper_cleanup_planes(dev, state);
    
    return 0;
}

// hdmitx21/hdmi_tx_video.c - 视频参数配置
struct hdmi_video_format {
    u32 hsync_width;    // 水平同步宽度
    u32 hback_porch;   // 后沿
    u32 hactive;       // 有效像素
    u32 hfront_porch;  // 前沿
    
    u32 vsync_width;   // 垂直同步
    u32 vback_porch;
    u32 vactive;
    u32 vfront_porch;
    
    u32 pixel_repeat;  // 像素重复
    u32 color_depth;   // 色深 (8/10/12-bit)
};

// meson_writeback.h - Amlogic 扩展的 writeback 结构
struct am_drm_writeback {
    struct meson_connector base;                    // 基类
    struct drm_writeback_connector wb_connector;   // DRM writeback connector
    struct drm_device drm_dev;                    // DRM 设备
    struct work_struct writeback_work;             // 捕获工作队列
    struct workqueue_struct *writeback_wq;        // workqueue
    struct drm_framebuffer *fb;                   // 目标帧缓冲
    u32 capture_port;                             // 捕获端口
    struct drm_property *capture_port_prop;        // 捕获端口属性
};

// DRM framework - writeback connector
struct drm_writeback_connector {
    struct drm_connector base;
    struct drm_encoder encoder;
    // ...
};

// meson_writeback.c:396 - Writeback 初始化
int am_meson_writeback_create(struct drm_device *drm)
{
    // 1. 分配 writeback 结构
    drm_writeback = kzalloc(sizeof(*drm_writeback), GFP_KERNEL);
    
    // 2. 设置 encoder 的 CRTC 掩码
    wb_connector->encoder.possible_crtcs = BIT(0);
    
    // 3. 获取支持的像素格式
    ret = meson_writeback_get_format(writeback_fmts);
    
    // 4. 注册 writeback connector
    ret = drm_writeback_connector_init(drm, wb_connector,
        &am_writeback_connector_funcs,
        &am_writeback_encoder_helper_funcs,
        writeback_fmts, ARRAY_SIZE(writeback_fmts));
    
    // 5. 创建 workqueue
    drm_writeback->writeback_wq = alloc_workqueue("writeback_capture",
        WQ_HIGHPRI | WQ_CPU_INTENSIVE, 0);
    
    // 6. 初始化 work
    INIT_WORK(&drm_writeback->writeback_work, meson_writeback_capture_work);
}

// meson_writeback.c:50 - Atomic check
static int meson_writeback_connector_atomic_check(struct drm_connector *conn,
    struct drm_atomic_state *state)
{
    conn_state = drm_atomic_get_new_connector_state(state, conn);
    
    // 检查是否有 writeback job
    if (!conn_state->writeback_job)
        return 0;
    
    crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
    fb = conn_state->writeback_job->fb;
    
    // 检查帧缓冲尺寸是否匹配
    if (fb->width != crtc_state->mode.hdisplay ||
        fb->height != crtc_state->mode.vdisplay) {
        DRM_ERROR("Invalid framebuffer size %ux%u\n", fb->width, fb->height);
        return -EINVAL;
    }
    
    // 检查像素格式是否支持
    for (i = 0; i < ARRAY_SIZE(writeback_fmts); i++) {
        if (fb->format->format == writeback_fmts[i])
            break;
    }
    
    return 0;
}

// meson_writeback.c:194 - Atomic commit
static void meson_writeback_connector_atomic_commit(struct drm_connector *conn,
    struct drm_atomic_state *old_atomic_state)
{
    conn_state = drm_atomic_get_old_connector_state(old_atomic_state, conn);
    drm_writeback = connector_to_am_writeback(conn);
    fb = conn_state->writeback_job->fb;
    drm_writeback->fb = fb;
    
    // 队列到 workqueue 执行捕获
    drm_writeback_queue_job(&drm_writeback->wb_connector, conn_state);
    queue_work(drm_writeback->writeback_wq, &drm_writeback->writeback_work);
}

// meson_writeback.c:182 - Work 处理
static void meson_writeback_capture_work(struct work_struct *work)
{
    drm_writeback = container_of(work, struct am_drm_writeback, writeback_work);
    
    // 执行实际捕获
    meson_writeback_capture_picture(drm_writeback->fb, drm_writeback->capture_port);
    
    // 通知完成
    drm_writeback_signal_completion(&drm_writeback->wb_connector, 0);
}

// meson_writeback.c:352 - 捕获端口枚举
static const struct drm_prop_enum_list writeback_capture_port_enum_list[] = {
    { TVIN_PORT_VIU1_WB0_VD1, "video" },      // 仅视频层
    { TVIN_PORT_VIU1_WB0_OSD1, "osd" },       // 仅 OSD 层
    { TVIN_PORT_VIU1_WB0_VPP, "video&osd" }, // 视频和 OSD 混合
};

// 用户空间使用示例
struct drm_mode_capture {
    u32 fb_id;          // 捕获目标帧缓冲
    u32 out_fence;       // 输出 fence
    u32 connector_id;    // writeback connector ID
    u32 flags;
};

// 1. 创建用于捕获的帧缓冲
drmModeFB2Create(dev, width, height, DRM_FORMAT_NV12, handles, pitches, offsets, &fb_id);

// 2. 提交 writeback job
drm_writeback_queue_job(connector, fb_id, &out_fence);

// 3. 等待捕获完成
sync_file_wait(out_fence, 1000);

// 4. 使用捕获的缓冲区
// ... 对捕获内容进行处理

// meson_atomic.c:573 - 同步 commit 路径
if (!nonblock) {
    meson_commit_reenter_inc(priv, crtc_index, BLOCK_MODE);
    meson_commit_tail(state);  // 同步等待完成
    meson_commit_reenter_dec(priv, crtc_index, BLOCK_MODE);
}

// meson_atomic.c:564 - 非阻塞 commit 入口
if (nonblock) {
    work_item = kzalloc(sizeof(*work_item), GFP_KERNEL);
    work_item->work = &state->commit_work;
    work_item->crtc_id = crtc_id;
    work_item->commit_flag = nonblock;
    
    // 初始化 kthread work
    kthread_init_work(&work_item->kthread_work, meson_commit_work);
    
    // 队列到 per-CRTC worker
    worker = &priv->commit_thread[crtc_index].worker;
    kthread_queue_work(worker, &work_item->kthread_work);
    
    return 0;  // 立即返回，不等待完成
}

// meson_atomic.c:238 - 异步执行
static void meson_commit_work(struct kthread_work *work)
{
    struct meson_commit_work_item *work_item = container_of(work,
        struct meson_commit_work_item, kthread_work);
    struct drm_atomic_state *state = container_of(work_item->work,
        struct drm_atomic_state, commit_work);
    
    meson_commit_reenter_inc(priv, work_item->crtc_id, NONBLOCK_MODE);
    meson_commit_tail(state);  // 在 kthread 中执行
    meson_commit_reenter_dec(priv, work_item->crtc_id, NONBLOCK_MODE);
    kfree(work_item);
}

// meson_drv.c:233 - 为每个 CRTC 创建独立线程
static int meson_worker_thread_init(struct meson_drm *priv, unsigned int num_crtcs)
{
    for (i = 0; i < num_crtcs; i++) {
        worker = &drm_thread->worker;
        kthread_init_worker(worker);
        
        // 创建高优先级线程 (SCHED_FIFO, priority=16)
        snprintf(thread_name, 16, "crtc%d_commit", i);
        drm_thread->thread = kthread_run(kthread_worker_fn, worker, thread_name);
        
        sched_setscheduler(drm_thread->thread, SCHED_FIFO, &param);
    }
}

// meson_atomic.c:491 - async update 路径
if (state->async_update) {
    priv->pan_async_commit_ran = true;
    
    // 准备 plane 资源
    ret = drm_atomic_helper_prepare_planes(dev, state);
    
    // 交换 state
    ret = drm_atomic_helper_swap_state(state, true);
    
    // 直接执行 plane 更新，跳过完整 commit
    meson_atomic_helper_async_commit(dev, state);
    
    // 清理
    drm_atomic_helper_cleanup_planes(dev, state);
    
    return 0;
}

// meson_plane.c:1740 - Video plane 异步更新
void meson_video_plane_async_update(struct drm_plane *plane, struct drm_atomic_state *state)
{
    new_state = drm_atomic_get_new_plane_state(state, plane);
    
    // 更新 plane 状态（原地修改）
    plane->state->fb = new_state->fb;
    plane->state->src_x = new_state->src_x;
    plane->state->crtc_x = new_state->crtc_x;
    
    // 准备 video fence（如果是新帧）
    if (!meson_video_plane_is_repeat_frame(plane, new_state))
        meson_video_prepare_fence(plane, new_state, mvv);
    
    // 更新硬件
    vpu_pipeline_video_update(sub_pipe, new_state->state);
}

// meson_async_atomic.c:375 - 设置 legacy 标志
state->legacy_cursor_update = true;
ret = drm_atomic_commit(state);

// meson_atomic.c:376 - legacy cursor 特殊处理
if (state->legacy_cursor_update) {
    ret = meson_drm_atomic_helper_setup_commit(state, nonblock);
    state->legacy_cursor_update = false;  // 强制清除
    DRM_DEBUG_ATOMIC("legacy_cursor_update force to false!\n");
}

// meson_atomic.c:470 - 入口判断
int meson_atomic_commit(..., bool nonblock)
{
    // 1. 检查是否是 async_update
    if (state->async_update) {
        // 走 Async Update 快速路径
        return handle_async_update(dev, state);
    }
    
    // 2. 检查是否是 legacy_cursor_update
    if (state->legacy_cursor_update) {
        // 走 Legacy Cursor 路径
        return handle_legacy_cursor(dev, state);
    }
    
    // 3. 根据 nonblock 标志选择
    if (nonblock) {
        // 队列到 kthread，异步执行
        kthread_queue_work(...);
        return 0;
    } else {
        // 同步执行
        meson_commit_tail(state);
        return 0;
    }
}

// include/drm/gpu_scheduler.h
enum drm_sched_priority {
    DRM_SCHED_PRIORITY_MIN,
    DRM_SCHED_PRIORITY_NORMAL,
    DRM_SCHED_PRIORITY_HIGH,
    DRM_SCHED_PRIORITY_KERNEL,
    DRM_SCHED_PRIORITY_COUNT
};

/* 调度策略 */
#define DRM_SCHED_POLICY_RR    0   // Round Robin
#define DRM_SCHED_POLICY_FIFO  1   // First In First Out (default)
extern int drm_sched_policy;

// 调度器结构 - include/drm/gpu_scheduler.h
struct drm_gpu_scheduler {
    const struct drm_sched_backend_ops    *ops;
    unsigned int            hw_submission_limit;  // 硬件队列最大长度
    timeout_t               timeout;              // 作业超时时间
    const char              *name;
    struct drm_sched_rq     sched_rq[DRM_SCHED_PRIORITY_COUNT];  // 优先级队列数组
    struct task_struct     *thread;               // 调度线程
    // ...
};

// 运行队列
struct drm_sched_rq {
    spinlock_t              lock;
    struct drm_gpu_scheduler *sched;
    struct list_head        entities;              // 实体链表
    struct drm_sched_entity *current_entity;      // 当前执行的实体
    struct rb_root_cached   rb_tree_root;         // FIFO 调度的红黑树
};

// 实体 - 作业容器
struct drm_sched_entity {
    struct list_head        list;
    struct drm_sched_rq     *rq;
    enum drm_sched_priority priority;
    // ...
};